Equalization techniques can be used to improve signal quality or correct digital signals. In digital feedback loops, loop unrolling is a technique that pre-calculates all possible combinations of filter multiplications and additions in advance of selecting an output based on previous outputs. For a parallel circuit, the output of each branch must be valid within a single clock period, so as the number of parallel branches increases, the speed of the unrolled loops may be limited.
In loop unfolding, L levels of look-ahead expansion are performed on the unrolled architecture to create a parallel architecture. As the number of levels L increases, the resulting size of the parallel architecture and associated delays can be large and may also limit speed.
Smaller and faster decision feedback circuits would be beneficial.